PRODUCTS
   SUPPORT
   COMPANY INFO
   PARTNERS
   TRANSLATION
  
Update Notice

Thank you for visiting The Western Design Center, Inc.'s information website.
Please visit our Business Development Website for the latest information.


W65C22S Versatile Interface Adapter (VIA)
W65C22S Die

      W65C22S Die

Quick Links

IP Data Deliverables

WDC provides the following Data Deliverables in our technology transfer.

Hard Core
GDSII Mask Files
GDSII Schematic Files
GDSII Hard Core Flowchart N/A
Spice Extracted Netlist
CDL Netlist for LVS
Mask ROM files  N/A
Verilog Structural Gate Netlist
Viewlogic Files
Viewlogic Standard Product Behavioral Model Footprint NP
Viewlogic Behavioral Core Footprint NP
Viewlogic Standard Product Gate Model Footprint
Viewlogic Buffer Ring
Viewlogic Gate Core Footprint
Soft Core
Verilog RTL Model NP
Firm Core
Xilinx Synthesized Gate Model NP
Common Files
Verilog Test files
Sentry Test files

N/A ­ Not Applicable
NP ­ Not Planned
UC ­ Under Construction

WDC's microprocessor IP has been tailored for ease of reuse. The hard core IP is in the industry standard GDSII format.The buffer ring has been designed with off-chip drivers, including latch-up and ESD protection. When the core is embedded,the off­chip buffer ring is replaced with On­Chip­Bus (OCB) interface ring. The abstract cell is the connecting points with labels that provide core verification and system verification. WDC's test programs require that all test pins be compared to the standard test vendors.

  

©2003 - 2024 The Western Design Center, Inc.
2166 E. Brown Rd. Mesa, Arizona 85213
phone: 480 962-4545, fax: 480 835-6442

Last updated 01/05/2021
Today is Thursday, 03/28/2024
The time is 11:54:38am

Views since 10/6/2016: